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6.374 examines the device and circuit level optimization of digital building blocks. Topics covered include: MOS device models including Deep Sub-Micron effects; circuit design styles for logic, arithmetic and sequential blocks; estimation and minimization of energy consumption; interconnect models and parasitics; device sizing and logical effort; timing issues (clock skew and jitter) and active clock distribution techniques; memory architectures, circuits (sense amplifiers) and devices; testing of integrated circuits. The course employs extensive use of circuit layout and SPICE in design projects and software labs.
- Subject:
- Applied Science
- Career and Technical Education
- Computer Science
- Electronic Technology
- Engineering
- Material Type:
- Full Course
- Provider:
- MIT
- Provider Set:
- MIT OpenCourseWare
- Author:
- Chandrakasan, Anantha
- Date Added:
- 09/01/2003