Emphasizes the relationship among technology, hardware organization, and programming systems in the evolution of computer architecture. Pipelined, out-of-order, and speculative execution. Superscaler, VLIW, vector, and multithreaded processors. Addressing structures and virtual memory, and exception handling. I/O and memory systems. Parallel computers; message passing and shared memory systems. Memory models, synchronization, and cache coherence protocols. Vector supercomputers. Assumes an undergraduate knowledge of computer systems. 6.823 is a study of the evolution of computer architecture and the factors influencing the design of hardware and software elements of computer systems. Topics may include: instruction set design; processor micro-architecture and pipelining; cache and virtual memory organizations; protection and sharing; I/O and interrupts; in-order and out-of-order superscalar architectures; VLIW machines; vector supercomputers; multithreaded architectures; symmetric multiprocessors; and parallel computers.
Includes the basics of digital logical design, computer organization and architecture including assembly language, processor design, memory hierarchies and pipelining. Students examine the detailed construction of a very simple computer. Problem sets use Beta-Sim, a RISC simulator written by Mike Wessler. A higher level view of a modern RISC architecture is studied, using the Patterson and Hennessey introductory text, from both the programmer's point of view and the hardware designer's point of view. The distinction between RISC and CISC architectures is emphasized.
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